1. Field of the Invention
The present invention relates to a display apparatus. More particularly, the present invention relates to a display apparatus capable of reducing data signal lines and integrated circuits that drive the data signal lines.
2. Description of the Related Art
A cathode ray tube (CRT) is disadvantageous in its weight and size. Recently, various flat panel display devices have been developed. These flat panel display devices have a reduced weight and a reduced size. A flat panel display device includes a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP), an organic light emitting diode (OLED) display device, etc.
Among these flat panel display devices, the LCD device controls light transmittance of liquid crystal cells according to a video signal to thereby display a picture.
Referring to FIG. 1, an active matrix type LCD includes an LCD panel 13 having (n×m) sub-pixels arranged in a matrix, a gate driving circuit 12, and a data driving circuit 11. Each of the sub-pixels is connected to a thin film transistor (TFT). Each TFT is formed at the crossing parts of n number of gate lines (G1 to Gn) and m number of date lines (D1 to Dm). Herein, n is a positive integer and m is a positive integer. Each TFT is formed to implement any one color of red (R), green (G) and blue (B). The gate driving circuit 12 supplies a scan signal to the gate lines (G1 to Gn) and the data driving circuit 11 supplies a data signal to the data lines (D1 to Dm).
The LCD panel 13 is formed by combining two glass substrates and injecting liquid crystal molecules between the two glass substrates. The gate lines (G1 to Gn) and the data lines (D1 to Dm) are provided at the lower glass substrate of the LCD panel 13 and cross each other perpendicularly. Each TFT provided at a crossing between the pth gate line (Gp) and the qth data line (Dq) applies a data signal supplied via the qth data line (Dq) to the sub-pixel (P[p,q]) located at p row and q column. The supplied data signal is in response to a scan signal from the pth gate line (Gp). Herein, p is a positive integer equal to n or smaller than n and q is a positive integer equal to m or smaller than m. The sub-pixels implement red (R), green (G) and blue (B) colors in response to the data signal. The sub-pixels implementing each of red (R), green (G), and blue(B) colors forms one pixel 15 as shown in FIG. 1. The upper glass substrate of the LCD panel 13 is provided with black matrices, color filters and common electrodes (not shown). A first polarizer having a light axis is attached onto the upper glass substrate of the LCD panel 13 and a second polarizer having a light axis perpendicular to the light axis of the first polarizer is attached onto the lower glass substrate of the LCD panel 13. An alignment film for establishing a free-tilt angle of the liquid crystal is provided at the inner side of at least one of the first and second polarizers tangent to the liquid crystal. Each sub-pixel of the LCD panel 13 is provided with a storage capacitor. Each storage capacitor is provided between the pixel electrode of the sub-pixel and the pre-stage gate line, or between the pixel electrode of the sub-pixel and a common electrode line (not shown). Each storage capacitor enables constantly keeping a voltage of the sub-pixel.
The data driving circuit 11 includes a plurality of data driving integrated circuits. The data driving circuit 11 latches a digital video data, and converts the digital video data into an analog gamma compensation voltage to thereby apply it to the data lines (D1 to Dm).
The gate driving circuit 12 sequentially shifts a start signal every one horizontal period to sequentially apply a scan signal selecting a horizontal line to the gate lines (G1 to Gn).
In addition to the LCD device, flat panel display devices, such as OLED devices, PDP devices, FED devices, etc., also include one pixel organized by sub-pixels that implement red (R), green (G) and blue (B) colors. Each of these display devices includes: scan signal lines to supply a scan signal selecting a horizontal line to each sub-pixel; data signal lines to supply a data signal to each sub-pixel; a scan signal driving circuit that drives the scan signal lines and a data signal driving circuit that drives the data signal lines. In these flat panel display devices, such as in a QVGA device having 320×240 resolution to supply the data signal to each sub-pixel, data signal lines for supplying 320×3 data signals are required. In a VGA device having 640×480 resolution, data signal lines for supplying 640×3 data signals are required. The data signal driving circuit that supplies the data signal to each data signal line includes a number of data signal driving integrated circuits. Accordingly, there is a need to develop schemes that reduce the number of the data signal lines and the number of data signal driving integrated circuits.